EDN

Expanded FPGA, PLD architecture

Hillsboro, Ore. — The ispXP family of field programmable gate array (FPGA) and programmable logic (PLD) devices have been developed for wireless, telecom, and networking applications. The family ...
Design-Reuse

Lattice Introduces Revolutionary ispXPLD Programmable Architecture

HILLSBORO, OR - JULY 15, 2002 - Lattice Semiconductor Corporation (NASDAQ: LSCC), the inventor of in-system programmable (ISPTM) logic products, today introduced its revolutionary ispXPLDTM (in-system ...
EDN

Altera ports 58 cores to Stratix PLD architecture

PLD vendor Altera Corp. recently announced the availability of 58 cores optimized for its new Stratix field-programmable gate array family. The cores, which Altera calls “megafunctions,” are available ...
Design-Reuse

Altera courts ASIC designers with block-based Stratix PLD

SAN FRANCISCO — Looking to snatch the lead from archrival Xilinx Inc., Altera Corp. has taken the veil off a programmable-logic architecture that it hopes will dazzle ASIC designers and reclaim turf ...
Electronics Weekly

Altera aims PLDs at volume production

Altera has unveiled plans to bridge the gap between PLD design and Asic conversion, offering an alternative to customers who traditionally use PLDs during the design phase and then switch to standard ...
Semiconductor Engineering

Aplus Design Technologies Inc.

Aplus provides logical and physical synthesis and prototyping software solutions for programmable logic devices (PLDs). The company’s products include PALACE, which is an automated field programmable ...