The double-gate (DG) FET provides a fundamental advantage over conventional single-gate (SG) FETs. In short-channel FETs the drain potential competes with that of the gate to influence the channel.

Austin, Texas — Intel Corp. researchers will present a vertical triple-gate structure combined with a high-k oxide and metal electrode gate stack at the 2006 Symposium on VLSI Technology, which kicks ...

To achieve the power, performance, and area (PPA) advantages dictated by Moore’s law, transistors have evolved substantially over the years. The development of planar transistors at Fairchild ...

Front-end engineers at SEMATECH will combine planar CMOS approaches with new channel materials to develop effective transistors for the 22 nm half-pitch technology generation – but will continue to ...

An integrated circuit (IC) technique developed by Fairchild Instruments in 1959 that creates transistors on a flat surface compared to the uneven surface of the earlier mesa process. The planar ...

Purdue University researchers are making progress in developing a new type of transistor that uses a finlike structure instead of the conventional flat design, possibly enabling engineers to create ...

When they were first commercialized at the 22 nm node, finFETs represented a revolutionary change to the way we build transistors, the tiny switches in the “brains” of a chip. As compared to prior ...

At 0.128 µm2, a new SRAM cell using fin-shaped FETs (FinFETs) is the smallest such cell ever developed, according to Toshiba Corp, IBM, and AMD. At 0.128 µm 2, a new SRAM cell using fin-shaped FETs ...

Taiwan Semiconductor Manufacturing Company (TSMC) may be showing off its vision for the future of chip manufacturing technologies beyond 20 nanometers when it unveils its latest research into FinFET ...

We typically cover Intel's efforts in developing its next-generation nodes, such as Intel 4 (formerly 7nm), which is just now rolling off the production line. But today, Intel is announcing new ...

How FinFET technology has changed power-consumption analysis. Steps involved in taking a hierarchical approach to performing proper power analysis. Verification expert Lauro Rizzatti recently ...