Design-Reuse

STMicroelectronics Makes 28nm CMOS Process Available Through CMP

Geneva, June 15, 2011 - STMicroelectronics (NYSE: STM) and CMP (Circuits Multi Projets®) today announced that the CMOS 28nm process from STMicroelectronics is now available for prototyping to ...
Semiconductor Engineering

CMP, ST et al offer 28nm FD-SOI for prototyping, research

What would a port to 28nm FD-SOI do for your design? A recent announcement by CMP, STMicroelectronics and Soitec invites you to find out. Specifically, ST’s CMOS 28nm Fully Depleted ...
EDN

How fabrication services can aid CMOS and MEMS use in biomedical designs

Universities need to have access to technology for teaching their students who can be trained at least on the most up to date technology processes. Research Laboratories usually need to have high ...
EDN

France’s CMP offers access to ST’s 65-nm process

LONDON — Circuits Multi Projets (CMP), a multiproject wafer run aggregator, has introduced access to a 65-nanometer CMOS process from STMicroelectronics NV. The ST 65-nm library includes process ...
Silicon Semiconductor

Preventing liquid cross-contamination in semiconductor manufacturing

Producing high-purity wafers via the CMP process is a critical application and the halting of harmful slurry-DIW ...
AZOM

Using 3D Optical Profiling for Full-Field Hotspot Detection

Chemical mechanical polishing (CMP) – also known as planarization – has long been the most commonly employed technique for smoothing and flattening wafer surfaces during the fabrication of ...